
PIC18FXX39
DS30485A-page 198
Preliminary
2002 Microchip Technology Inc.
REGISTER 20-4:
CONFIG4L: CONFIGURATION REGISTER 4 LOW (BYTE ADDRESS 300006h)
R/P-1
U-0
R/P-1
U-0
R/P-1
DEBUG
—
—LVP
—STVREN
bit 7
bit 0
bit 7
DEBUG: Background Debugger Enable bit
1
= Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.
0
= Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.
bit 6-3
Unimplemented: Read as ‘0’
bit 2
LVP: Low Voltage ICSP Enable bit
1
= Low Voltage ICSP enabled
0
= Low Voltage ICSP disabled
bit 1
Unimplemented: Read as ‘0’
bit 0
STVREN: Stack Full/Underflow Reset Enable bit
1
= Stack Full/Underflow will cause RESET
0
= Stack Full/Underflow will not cause RESET
Legend:
R = Readable bit
C = Clearable bit
U = Unimplemented bit, read as ‘0’
- n = Value when device is unprogrammed
u = Unchanged from programmed state